E-tile Hard IP User Guide: E-Tile Hard IP for Ethernet and E-Tile CPRI PHY Intel® FPGA IPs
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2.9.3.4. Custom PCS Mode
The E-Tile Hard IP for Ethernet Intel FPGA IP supports up to four custom PCS channels with RSFEC feature. This mode bypasses the Ethernet MAC and uses MII interface to transmit and receive packets with data rate between 2.5 to 28 Gbps.
- TX PCS encoder—encodes the data from the PMA interface.
- TX PCS scrambler—enables the data to be scrambled. Channels cannot lock correctly if the data is not scrambled.
- Alignment insertion—the TX PCS interface inserts alignment markers.
- Striper—enables logically sequential data to be segmented to increase data throughput.
- Aligner—enables the alignment of incoming data.
- RX PCS descrambler—enables the incoming scrambled data to be descrambled.
- RX PCS decoder—decodes the incoming encoded data from the PMA interface.