E-tile Hard IP User Guide: E-Tile Hard IP for Ethernet and E-Tile CPRI PHY Intel® FPGA IPs

ID 683468
Date 9/26/2022
Public
Document Table of Contents

2.12.2.53. Deskew Depth 2

Offset: 0x381

Deskew Depth 2 Fields

Bit Name Description Access Reset
29:24 depth4 Deskew depth for one of the PCS Virtual lanes RO 0x0
23:18 depth3 Deskew depth for one of the PCS Virtual lanes RO 0x0
17:12 depth2 Deskew depth for one of the PCS Virtual lanes RO 0x0
11:6 depth1 Deskew depth for one of the PCS Virtual lanes RO 0x0
5:0 depth0 Deskew depth for one of the PCS Virtual lanes RO 0x0

Did you find the information on this page useful?

Characters remaining:

Feedback Message