External Memory Interfaces Intel® Stratix® 10 FPGA IP User Guide

ID 683741
Date 9/26/2022
Document Table of Contents

8. Intel® Stratix® 10 EMIF IP for QDR II/II+/II+ Xtreme

This chapter contains IP parameter descriptions, board skew equations, pin planning information, and board design guidance for Intel® Stratix® 10 external memory interfaces for QDR II/II+/II+ Xtreme.

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