External Memory Interfaces Intel® Stratix® 10 FPGA IP User Guide

ID 683741
Date 9/26/2022
Document Table of Contents

4.4.12. sideband1

address=44(32 bit)

Field Bit High Bit Low Description Access
mmr_refresh_req 3 0

Rank Refresh Request. When asserted, indicates a refresh request to the specific rank. Controller clears this bit to 0 when the refresh is executed.


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