Low Latency 100G Ethernet Intel® FPGA IP Core User Guide: For Intel® Stratix® 10 Devices

ID 683100
Date 2/16/2022
Document Table of Contents

2.2. Specifying the IP Core Parameters and Options

The Low Latency 100G Ethernet Intel FPGA parameter editor allows you to quickly configure your custom IP variation. Use the following steps to specify IP core options and parameters in the Intel® Quartus® Prime Pro Edition software.
  1. If you do not already have an Intel® Quartus® Prime Pro Edition project in which to integrate your Low Latency 100G Ethernet Intel FPGA IP core, you must create one.
    1. In the Intel® Quartus® Prime Pro Edition, click File > New Project Wizard to create a new Intel® Quartus® Prime project, or File > Open Project to open an existing Intel® Quartus® Prime project. The wizard prompts you to specify a device.
    2. Specify the device family and select a device that meets all of these requirements:
      1. Transceiver tile is L-tile or H-tile
      2. Transceiver speed grade is –1 or –2
      3. Core speed grade is –1 or –2
        Note: For Intel® Stratix® 10 devices, 1SG280L ES1 is not a device (part name 1SG280L...VGS1).
    3. Click Finish.
  2. In the IP Catalog, locate and select Low Latency 100G Ethernet. The New IP Variation window appears.
  3. Specify a top-level name for your new custom IP variation. The parameter editor saves the IP variation settings in a file named <your_ip> .ip.
  4. Click OK. The parameter editor appears.
  5. Specify the parameters for your IP core variation. Refer to IP Core Parameters for information about specific IP core parameters.
  6. Optionally, to generate a simulation testbench or compilation and hardware design example, follow the instructions in the Design Example User Guide.
  7. Click Generate HDL. The Generation dialog box appears.
  8. Specify output file generation options, and then click Generate. The IP variation files generate according to your specifications.
    Note: A functional VHDL IP core is not available. Specify Verilog HDL only, for your IP core variation.
  9. Click Finish. The parameter editor adds the top-level .ip file to the current project automatically. If you are prompted to manually add the .ip file to the project, click Project > Add/Remove Files in Project to add the file.
  10. After generating and instantiating your IP variation, make appropriate pin assignments to connect ports.