Low Latency 100G Ethernet Intel® FPGA IP Core User Guide: For Intel® Stratix® 10 Devices

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ID 683100
Date 2/16/2022
Public
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4.6. Auto Negotiation and Link Training

The Low Latency 100G Ethernet Intel FPGA IP core variations with auto negotiation and link training implement the IEEE Backplane Ethernet Standard 802.3-2012.

The IP core includes the option to implement the following features:

  • Auto negotiation provides a process to explore coordination with a link partner on a variety of different common features. Turn on the Enable AN/LT and Enable Auto Negotiation parameters to configure support for auto negotiation.
  • Link training provides a process for the IP core to train the link to the data frequency of incoming data, while compensating for variations in process, voltage, and temperature. Turn on the Enable AN/LT and Enable Link Training parameters to configure support for link training.

The Low Latency 100G Ethernet Intel FPGA IP core includes separate link training modules for each of the four Ethernet lanes, and a single auto negotiation module. You specify the master lane for performing auto negotiation in the parameter editor.

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