Low Latency 100G Ethernet Intel® FPGA IP Core User Guide: For Intel® Stratix® 10 Devices

ID 683100
Date 2/16/2022
Document Table of Contents

1.3.2. Compilation Checking

Intel performs compilation testing on an extensive set of Low Latency 100G Ethernet Intel FPGA IP core variations and designs that target different devices, to ensure the Intel® Quartus® Prime software places and routes the IP core ports correctly.