Low Latency 100G Ethernet Intel® FPGA IP Core User Guide: For Intel® Stratix® 10 Devices

ID 683100
Date 2/16/2022
Public

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7.3. RX MAC Registers

Table 25.  RX MAC Registers
Addr Name Description Reset Access
0x500 RXMAC_REVID RX MAC revision ID. 0x0809 2017 RO
0x501 RXMAC_SCRATCH Scratch register available for testing. 0x0000 0000 RW
0x502 RXMAC_NAME_0 First 4 characters of IP core variation identifier string, "100g". 0x3130 3067

RO

0x503 RXMAC_NAME_1 Next 4 characters of IP core variation identifier string, "MACR". 0x4D41 4352

RO

0x504 RXMAC_NAME_2 Final 4 characters of IP core variation identifier string, "xCSR". 0x7843 5352

RO

0x506 RXMAC_SIZE_CONFIG Specifies the maximum frame length available. The MAC asserts l8_rx_error[3] when the length of the received frame exceeds the value of this register.

If the IP core receives an Ethernet frame of size greater than the number of bytes specified in this register, and the IP core includes statistics registers, the IP core increments the 64-bit CNTR_RX_OVERSIZE counter.

The minimum value of this register is 64 (decimal).

0xXXXX 2580

RW

0x507 MAC_CRC_CONFIG The RX CRC forwarding configuration register. The following encodings are defined:
  • 1'b0 : Remove RX CRC, do not forward it to the RX client interface
  • 1'b1 : Retain RX CRC, forward it to the RX client interface
In either case, the IP core checks the incoming RX CRC and flags errors.
31'hX1'b0

RW

0x508 LINK_FAULT

Link Fault Status Register.

For unidirectional Link Fault, implements IEEE 802.3 Ethernet Clause 66.

30'hX2'b00

RO

0x50A RXMAC_CONTROL RX MAC Control Register. The following bits are defined:
  • Bit[4] – Preamble check. Strict SFD checking option to compare each packet preamble to 0x555555555555. This field is available only if you turn on Enable Strict SFD check .
  • Bit[3] – SFD check. Strict SFD checking option to compare each SFD byte to 0x5D. This field is available only if you turn on Enable Strict SFD check .
  • Bit [1] – VLAN detection disabled. This bit is deasserted by default implying VLAN detection is enabled.
27'h0_5'b11X0X RW