4.2.5. Inter-Packet Gap Adjustment
You can program the IPG adjustment to compensate for Alignment Marker insertion by the PHY by setting the number IDLE columns to be removed in the IPG_COL_REM register at offsets 0x406. By default, the IP core removes 20 IDLE columns in every Alignment Marker period (for 20 virtual lanes). You may set the this register to a larger value for clock compensation.