22.214.171.124.1. VIP Passthrough for HDMI Video Stream
The Clocked Video Input II (CVI II) Intel® FPGA IP core converts clocked video formats to Avalon-ST video by stripping incoming clocked video of horizontal and vertical blanking, leaving only active picture data.
- The IP core provides clock crossing capabilities to allow video formats running at different frequencies to enter the system.
- The IP core also detects the format of the incoming clocked video and provides this information in a set of registers.
- The Nios II processor uses this information to reconfigure the video frame mode registers of the CVO IP core in the VIP passthrough design.
The Video Frame Buffer II Intel® FPGA IP core buffers video frames into external RAM.
- The IP core supports double and triple buffering with a range of options for frame dropping and repeating.
- You can use the buffering options to solve throughput issues in the data path and perform simple frame rate conversion.
In a VIP passthrough design, you can reference the HDMI source PLL and sink PLL using separate clock sources. However, in a VIP bypass design, you must reference the HDMI source PLL and sink PLL using the same clock source.
The Clocked Video Output II (CVO II) Intel® FPGA IP core converts data from the flow-controlled Avalon-ST video protocol to clocked video.
- The IP core provides clock crossing capabilities to allow video formats running at different frequencies to be created from the system.
- It formats the Avalon-ST video into clocked video by inserting horizontal and vertical blanking and generating horizontal and vertical synchronization information using the Avalon-ST video control and active picture packets.
- The video frame is described using the mode registers that are accessed through the Avalon-MM control port.
|VIP Passthrough Design||VIP Bypass Design|
|Device Family||Symbols Per Clock||HDMI Specification Support||Bitec HDMI HSMC 2.0 Daughter Card||Directory||VIP Passthrough||VIP Bypass|
|Arria V||2||1.4b||HSMC (Rev8)||av_sk||Supported||Supported|
|4||2.0b||HSMC (Rev8)||av_sk_hdmi2||Not supported||Supported|
|Stratix V||2||2.0b||HSMC (Rev8)||sv_hdmi2||Not supported||Supported|
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