HDMI Intel® FPGA IP User Guide

ID 683798
Date 3/03/2023
Public

A newer version of this document is available. Customers should click here to go to the newest version.

Document Table of Contents

9.2.2.16. VIDEO_MODE_F0_VERTICAL_BLANKING (0x60)

Table 116.  VIDEO_MODE_F0_VERTICAL_BLANKING (0x60)
Name Bit(s) Access Description Reset
Reserved 31:16 - - -
F0 vertical blanking 15:0 RW Specifies the length of the field 0 vertical blanking period (interlaced video only) in lines. 0x0