HDMI Intel® FPGA IP User Guide

ID 683798
Date 1/30/2023
Public
Document Table of Contents

9.3.1.11. USER_PACKET_FILTER (0x10)

Table 131.  USER_PACKET_FILTER (0x10)
Name Bit Access Description Reset
User packet filter 31:0 RW

Allows selected packets through to memory-mapped interface.

[0] - null

[1] - audio clock regeneration

[2] - audio sample

[3] - GCP

[4] - ACP

[5] - ISRC1

[6] - ISRC2

[7] - 1-bit audio

[8] - DST audio

[9] - HBR

[10] - GAMUT

[11] - 3D audio

[12] - 3D 1-bit audio

[13] - 3D audio metadata

[14] - multi-stream audio

[15] - 1-bit multi-stream audio

[17] - VSI infoframe

[18] - AVI infoframe

[19] - Source Descriptor InfoFrame

[20] - Audio InfoFrame

[21] - MPEG InfoFrame

[23] - Dynamic Range and Mastering InfoFrame

0x0

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