HDMI Intel® FPGA IP User Guide

ID 683798
Date 7/29/2022
Public
Document Table of Contents

4.3.1.12. Oversampler (TX)

The Oversampler (TX) transmits data by repeating each bit of the input word a given number of times and constructs the output words.

The oversampling factor is fixed at 5. The Oversampler (TX) assumes that the input word is only valid every 5 clock cycles. This block enables when the outgoing data stream is determined to be below the TX transceiver minimum link rate by reading once from the DCFIFO every 5 clock cycles.

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