HDMI Intel® FPGA IP User Guide

ID 683798
Date 1/30/2023
Public
Document Table of Contents

9.2.2.6. VIDEO_MODE_F0_LINE_COUNT (0x56)

Table 105.  VIDEO_MODE_F0_LINE_COUNT (0x56)
Name Bit(s) Access Description Reset
Reserved 31:16 - - -
F0 line count 15:0 RW Specifies the active picture height of progressive video or interlaced video field 0. 0x0

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