HDMI Intel® FPGA IP User Guide

ID 683798
Date 1/30/2023
Public
Document Table of Contents

9.1.1.27. AUDIO_METADATA_CONTROL (0x24)

Table 90.  AUDIO_METADATA_CONTROL (0x24)
Name Bit(s) Access Description Reset
Reserved [31:1] - - -
Audio metadata disable 0 RW When set to 1, HDMI TX core does not send the audio metadata from HDMI TX AUDIO_METADATA_PACKET_DATA registers.

When set to 0, HDMI TX core sends the audio infoframe from HDMI TX AUDIO_METADATA _PACKET_DATA registers.

0x0

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