HDMI Intel® FPGA IP User Guide

ID 683798
Date 1/30/2023
Public
Document Table of Contents

9.3.1.8. AVI_PACKET_DATA1 (0x0D)

Refer to HDMI Specification 1.4b Section 8.2.1 Auxiliary Video Information (AVI) InfoFrame for the details of each field.

Name Bit Access Description Reset
AVI PB7 31:24 RO

AVI packet data byte 6.

Line number of end of top bar (lower 8 bits).

0x0
AVI PB6 23:16 RO

AVI packet data byte 6.

Line number of end of top bar (lower 8 bits).

0x0
AVI PB5 15:8 RO

AVI packet data byte 5.

[3:0] PR3,PR2,PR1,PR0

[5:4] CN1,CN0

[7:6] YQ1,YQ0

0x0
AVI PB4 7:0 RO

AVI packet data byte 4.

[7:0] VIC

0x0

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