HDMI Intel® FPGA IP User Guide

ID 683798
Date 3/03/2023
Public

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Document Table of Contents

2.3. Feature Support

Table 5.   HDMI Intel® FPGA IP FRL Feature Support in Intel® Agilex™ F-tile, Intel® Stratix® 10, and Intel® Arria® 10 Devices
Feature Support Level
Support FRL = 1 Intel® Arria® 10 Final
Intel® Stratix® 10 Final
Intel® Agilex™ F-tile Preliminary
Support FRL = 0 Intel® Arria® 10 Final
Intel® Stratix® 10 Final
Intel® Agilex™ F-tile No Support

The following terms define IP feature support levels for HDMI Intel® FPGA IP:

  • Preliminary support—The IP meets the functional requirement for the feature set as listed in this user guide. Additional features, characterization, and system level design guidelines shall be covered in future releases. The IP can be used in production designs for the supported device family with caution.
  • Final support—The IP is compliant to the protocol CTS requirement for the supported device family and can be used in production design. Characterization report and system level design guidelines are available to facilitate meeting PHY CTS requirements.