184.108.40.206.2. Source SCDC Controller
For example, if the outgoing data stream is 6,000 Mbps, the Nios II processor commands the I2C master controller to update the TMDS_Bit_Clock_Ratio and Scrambler_Enable bits of the sink TMDS configuration register to 1. The same I2C master can also transfer the DDC data structure (E-EDID) between the HDMI source and external sink.
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