HDMI Intel® FPGA IP User Guide

ID 683798
Date 1/30/2023
Public
Document Table of Contents

9.2.2.17. VIDEO_MODE_ACTIVE_PICTURE_LINE (0x61)

Table 116.  VIDEO_MODE_ACTIVE_PICTURE_LINE (0x61)
Name Bit(s) Access Description Reset
Reserved 31:16 - - -
Active picture line 15:0 RW Specifies the line number given to the first line of active picture. 0x0

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