HDMI Intel® FPGA IP User Guide

ID 683798
Date 3/03/2023
Document Table of Contents F1_TOTAL_LINE_COUNT (0x57)

Table 157.  F1_TOTAL_LINE_COUNT (0x57)
Name Bit(s) Access Description Reset
Reserved 31:16 - - -
F1 total line count 15:0 RO The detected line count of the interlaced video field 1 including blanking. 0x0

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