1. About the Video and Vision Processing Suite
2. Getting Started with the Video and Vision Processing IPs
3. Video and Vision Processing IPs Functional Description
4. Video and Vision Processing IP Interfaces
5. Video and Vision Processing IP Registers
6. Video and Vision Processing IPs Software Programming Model
7. Protocol Converter IP
8. 1D LUT IP
9. 3D LUT IP
10. Adaptive Noise Reduction IP
11. Advanced Test Pattern Generator IP
12. AXI-Stream Broadcaster IP
13. Bits per Color Sample Adapter IP
14. Black Level Correction IP
15. Black Level Statistics IP
16. Chroma Key IP
17. Chroma Resampler IP
18. Clipper IP
19. Clocked Video Input IP
20. Clocked Video to Full-Raster Converter IP
21. Clocked Video Output IP
22. Color Plane Manager IP
23. Color Space Converter IP
24. Defective Pixel Correction IP
25. Deinterlacer IP
26. Demosaic IP
27. FIR Filter IP
28. Frame Cleaner IP
29. Full-Raster to Clocked Video Converter IP
30. Full-Raster to Streaming Converter IP
31. Genlock Controller IP
32. Generic Crosspoint IP
33. Genlock Signal Router IP
34. Guard Bands IP
35. Histogram Statistics IP
36. Interlacer IP
37. Mixer IP
38. Pixels in Parallel Converter IP
39. Scaler IP
40. Stream Cleaner IP
41. Switch IP
42. Text Box IP
43. Tone Mapping Operator IP
44. Test Pattern Generator IP
45. Unsharp Mask IP
46. Video and Vision Monitor Intel FPGA IP
47. Video Frame Buffer IP
48. Video Frame Reader Intel FPGA IP
49. Video Frame Writer Intel FPGA IP
50. Video Streaming FIFO IP
51. Video Timing Generator IP
52. Vignette Correction IP
53. Warp IP
54. White Balance Correction IP
55. White Balance Statistics IP
56. Design Security
57. Document Revision History for Video and Vision Processing Suite User Guide
31.4.1. Achieving Genlock Controller Free Running (for Initialization or from Lock to Reference Clock N)
31.4.2. Locking to Reference Clock N (from Genlock Controller IP free running)
31.4.3. Setting the VCXO hold over
31.4.4. Restarting the Genlock Controller IP
31.4.5. Locking to Reference Clock N New (from Locking to Reference Clock N Old)
31.4.6. Changing to Reference Clock or VCXO Base Frequencies (switch between p50 and p59.94 video formats and vice-versa)
31.4.7. Disturbing a Reference Clock (a cable pull)
9.2. 3D LUT IP Parameters
The 3D LUT IP offers compile-time parameters.
Name | Values | Description |
---|---|---|
Video data format | ||
Number of pixels in parallel | 1 to 8 | Number of pixels transmitted every clock cycle. |
Input bits per color sample | 8 to 16 | Number of bits per color sample at the input. |
Output bits per color sample | 8 to 16 | Number of bits per color sample at the output. |
Control settings | ||
Separate clock for control interface | On or off | Turn on to run the run-time control interface on a different clock domain. |
LUT read interface | On or off | Allows you to read LUT contents via the CPU interface. |
Enabled out of reset | On or off |
|
LUT settings | ||
Size | 9, 17, 33, 65 | Size of each LUT dimension. |
Bits per color | 8 to 16 | The number of bits per color in the LUT (LUT_DEPTH). |
Output alpha channel | On or off | Turn on to add alpha channel to the LUT (RGBA). |
Bypass alpha | 0 to 2 LUT_DEPTH -1 | The alpha value output in bypass mode. |
Double buffered | On or off | Double the memory for seamless LUT programming and switching:
|
Buffer 0 and Buffer 1 | ||
Initialize from file | On or off | Turn on to initialize the LUT from the initialization file. |
Init file | user file | Optional initialization file. |
Init file type | normalized, integer | Type of coefficients in the initialization file:
|
Figure 14. 3D LUT GUI

LUT Initialization File
You can initialize each buffer of the LUT from reset by providing a compatible 3D LUT file to Init file in the GUI. The IP generation process converts the LUT file into RAM initialization .hex files that get built into the firmware during compilation. The script can read .cube format files, or any 3D LUT files that follow these conventions:
- RGB component order (must match the video stream’s order)
- Components change first from left to right, i.e. R first, G second, B third
- If you turn on alpha, you append the alpha value as a fourth component (RGBA)
- The data type must match the IP GUI parameter and may either be:
- normalized fixed- or floating-point numbers between 0.0 to 1.0
- integers between 0 and 2LUT_DEPTH-1 (e.g. 10-bit: 0 to 1023)
- The data type must be the same for the whole file
- Lines starting with # or any letter are ignored