Visible to Intel only — GUID: nwq1684241248737
Ixiasoft
Visible to Intel only — GUID: nwq1684241248737
Ixiasoft
49.3.1. Video Frame Writer IP Interfaces
Name | Direction | Width | Description |
---|---|---|---|
Clocks and resets | |||
main_clock_clk | In | 1 | AXI4-S processing clock. |
main_reset_rst | In | 1 | AXI4-S processing reset. |
control_clock_clk | In | 1 | Optional control agent interface clock. |
control_reset_reset | In | 1 | Optional control agent interface reset. |
Control interfaces | |||
av_mm_control_agent_address | In | 7 | Avalon memory-mapped agent address |
av_mm_control_agent_write | In | 1 | Avalon memory-mapped agent write. |
av_mm_control_agent_writedata | In | 32 | Avalon memory-mapped agent write data. |
av_mm_control_agent_byteenable | In | 4 | Avalon memory-mapped agent byte enable. |
av_mm_control_agent_read | In | 1 | Avalon memory-mapped agent read. |
av_mm_control_agent_readdata | Out | 32 | Avalon memory-mapped agent read data. |
av_mm_control_agent_readdatavalid | Out | 1 | Avalon memory-mapped agent read. |
av_mm_control_agent_waitrequest | Out | 1 | Avalon memory-mapped agent wait request. |
Intel FPGA streaming video interface | |||
axi4s_vid_in_tdata | In | 147 | AXI4-S data in. |
axi4s_vid_in_tvalid | In | 1 | AXI4-S data valid. |
axi4s_vid_in_tuser[0] | In | 1 | AXI4-S start of video frame. |
axi4s_vid_in_tuser[1] | In | 1 | AXI4-S control or data packet. |
axi4s_vid_in_tuser[N-1:2] | In | 148 | Unused. |
axi4s_vid_in_tlast | In | 1 | AXI4-S end of packet. |
axi4s_vid_in_tready | Out | 1 | AXI4-S data ready |
Avalon memory-mapped host interfaces Widths for address, data, and burst count buses are as you specify in the GUI. The table shows example widths. |
|||
mem_clock_clk | In | 1 | Optional host interface clock. |
mem_reset_reset | In | 1 | Optional host interface reset. |
av_mm_mem_write_host_address | Out | 32 | Avalon memory-mapped host address |
av_mm_mem_write_host_write | Out | 1 | Avalon memory-mapped host write. |
av_mm_mem_write_host_burstcount | Out | 5 | Avalon memory-mapped host write burst count. |
av_mm_mem_write_host_writedata | In | 32 | Avalon memory-mapped host write data. |
av_mm_mem_write_host_waitrequest | In | 1 | Avalon memory-mapped host wait request. |
The equation gives all axi4s_vid_out_tdata widths in these interfaces:
max(2, ceil ((bits per color sample × number of color planes)/8)) × pixels in parallel × 8
This equation gives all axi4s_vid_out_tuser widths in these interfaces N = ceil (tdata width / 8)