HDMI Intel® FPGA IP User Guide

ID 683798
Date 4/22/2022
Public

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2.4. Resource Utilization

The resource utilization data indicates typical expected performance for the HDMI Intel® FPGA IP in the Intel® Quartus® Prime Pro Edition software.
Table 6.  HDMI Data RateThe table lists the maximum data rates for HDMI Intel® FPGA IP configurations.
Devices Maximum Data Rate (Mbps)
2 Pixels per Clock

(Support FRL = 0)

8 Pixels per Clock

(Support FRL = 1)

Intel® Stratix® 10 5,940

(Example: 4Kp60 8 bpc)

12,000

(Example: 8Kp30 12 bpc)

Intel® Arria® 10 5,940

(Example: 4Kp60 8 bpc)

12,000

(Example: 8Kp30 12 bpc)

Intel® Cyclone® 10 GX 5,940

(Example: 4Kp60 8 bpc)

Not Supported
Intel® Agilex™ F-tile Not supported 12,000 (Example: 8Kp30 12 bpc)
Table 7.   HDMI Intel® FPGA IP Resource UtilizationThe table lists the performance data for the different Intel FPGA devices.
Device Pixels per Clock Direction ALMs Logic Registers Memory
Primary Secondary Bits M10K or M20K
Intel® Stratix® 10 H-tile

(Support FRL = 0)

1
2 RX 5.041 6,633 902 38,400 14
2 TX 4,975 7,559 1,368 37,568 13
Intel® Stratix® 10 L-tile

(Support FRL = 0)

1
2 RX 5,025 6,584 967 38,400 14
2 TX 4,966 7,539 1,425 37,568 13
Intel® Arria® 10

(Support FRL = 0)

2 RX 3,768 5,716 1,049 36,352 14
2 TX 4,445 7,016 1,701 36,968 13
Intel® Arria® 10

(Support FRL = 1)2

8 RX 48,865 55,417 13,067 376,832 87
8 TX 30,092 35,533 6,839 276,288 60
Intel® Cyclone® 10 GX 2 RX 4,000 5,768 965 38,400 14
2 TX 4,484 7,167 1,629 36,968 13
Intel® Agilex™ F-tile (Support FRL = 1)1 8 RX 33,845 3,942 8,517 229,888 62
8 TX 23,217 28,174 5,590 213,376 36
Table 8.  Recommended Speed Grades for Intel® Agilex™ F-tile, Intel® Stratix® 10, and Intel® Arria® 10 Devices (Support FRL = 1)
Device Lane Rate (Mbps) Transceiver Interface Width (bits) Speed Grade
Intel® Stratix® 10 12,000 40 -1, -2 3
Intel® Arria® 10 12,000 40 -1, -2
Intel® Agilex™ F-tile 12,000 40 -1
Table 9.  Recommended Speed Grades for Intel® Stratix® 10, Intel® Arria® 10, and Intel® Cyclone® 10 GX Devices (Support FRL = 0)
Device Lane Rate (Mbps) Interface Width (bits) Speed Grades
Intel® Stratix® 10 6,000 20 -1, -2
Intel® Arria® 10 6,000 20 -1, -2
Intel® Cyclone® 10 GX 6,000 20 -5
Table 10.  HDCP Resource UtilizationThe table lists the HDCP resource data for Intel® Arria® 10 and Intel® Stratix® 10 devices.
Device HDCP IP Support HDCP Key Management Support FRL Pixels/TMDS Symbols Per Clock ALMs Combinational ALUTs Registers M20K DSP
Intel® Arria® 10 HDCP 2.3 TX 0 0 2 6,479 10,548 12,015 10 3
1 8 16,629 28,783 23,606 10 3
1 0 2 6,875 11,338 12,793 12 3
1 8 17,048 29,534 24,367 12 3
HDCP 2.3 RX 0 0 2 7,119 11,685 12,673 11 3
1 8 17,083 30,148 24,068 11 3
1 0 2 7,543 12,420 13,406 13 3
1 8 17,552 30,861 24,806 13 3
HDCP 1.4 TX 0 0, 1 2 1,665 2,626 4,411 2 0
1 0, 1 2 2,142 3,411 5,167 4 0
HDCP 1.4 RX 0 0, 1 2 1,170 1,850 3,407 3 0
1 0, 1 2 1,616 2,558 4,207 5 0
Intel® Stratix® 10 HDCP 2.3 TX 0 0 2 7,213 11,582 12,810 10 3
1 8 17,755 29,784 24,428 10 3
1 0 2 7,888 12,473 13,188 12 3
1 8 18,477 30,540 25,191 12 3
HDCP 2.3 RX 0 0 2 8,145 12,691 13,438 11 3
1 8 18,482 30,881 25,422 11 3
1 0 2 8,644 13,382 13,640 13 3
1 8 19,096 31,460 26,138 13 3
HDCP 1.4 TX 0 0, 1 2 2,320 2,937 4,544 2 0
1 0, 1 2 2,881 3,797 5,170 4 0
HDCP 1.4 RX 0 0, 1 2 1,784 2,135 3,605 3 0
1 0, 1 2 2,293 2,897 4,219 5 0
1 Resource data for Support FRL = 1 design is not finalized.
2 Contact Intel Sales for further optimization for specific device variants.
3 Contact Intel Sales if you need to use -2 speed grade.

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