HDMI Intel® FPGA IP User Guide

ID 683798
Date 4/22/2022
Public

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9.2.2.3. VIDEO_MODE_BANK_SELECT (0x53)

Table 102.  VIDEO_MODE_BANK_SELECT (0x53)
Name Bit(s) Access Description Reset
Video mode bank select 31:0 RW Writes to the video mode registers (0x54-0x6D) reflect to the video mode bank selected by this one-hot register. Only 1 mode bank is available. Writes 0x1 to this register to select mode bank 1. 0x0

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