18.104.22.168. View the Results
To view the results of the demonstration, follow these steps:
- Power up the Intel FPGA board.
- Type the following command on the Nios II Command Shell to download the Software Object File (.sof) to the FPGA.
nios2-configure-sof output_files/<Quartus project name>.sof
- Power up the standard HDMI source and sink (if you haven't done so).
The design displays the output of your video source (PC).Note: If the output does not appear, press cpu_resetn to reinitialize the system or perform HPD by unplugging the cable from the standard source and plug it back again.
- Open the graphic card control utility (if you are using a PC as source). Using the control panel, you can switch between various video resolutions.
The av_hdmi2 and sv_hdmi2 demonstration designs allow any video resolutions up to 4Kp60. The av_sk design allows 640×480p60, 720×480p60, 1280×720p60, 1920×1080p60, and 3840×2160p24 when you select the VIP passthrough mode (user_dipsw = 0). If you select the VIP bypass mode (user_dipsw = 1, the design allows any video resolutions up to 4Kp60.
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