Cyclone® V Device Handbook: Volume 1: Device Interfaces and Integration

ID 683375
Date 10/18/2023
Document Table of Contents

6.4.2. External Memory Interface Datapath

The following figure shows an overview of the memory interface datapath that uses the Cyclone® V I/O elements. In the figure, the DQ/DQS read and write signals may be bidirectional or unidirectional, depending on the memory standard. If the signal is bidirectional, it is active during read and write operations. You can bypass each register block.

Figure 119. External Memory Interface Datapath Overview for Cyclone® V Devices