Cyclone V Device Handbook: Volume 1: Device Interfaces and Integration

ID 683375
Date 7/05/2022
Document Table of Contents

6.4.8. Delay Chains

The Cyclone® V devices contain run-time adjustable delay chains in the I/O blocks and the DQS logic blocks. You can control the delay chain setting through the I/O or the DQS configuration block output.

Every I/O block contains a delay chain between the following elements:

  • The output registers and output buffer
  • The input buffer and input register
  • The output enable and output buffer
  • The R T OCT enable-control register and output buffer

You can bypass the DQS delay chain to achieve a 0° phase shift.

Figure 137. Delay Chains in an I/O Block

Each DQS logic block contains a delay chain after the dqsbusout output and another delay chain before the dqsenable input.

Figure 138. Delay Chains in the DQS Input Path

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