Intel® Cyclone® 10 GX Core Fabric and General Purpose I/Os Handbook

ID 683775
Date 10/25/2023
Document Table of Contents

10.7.2. Power-Down Sequence Recommendations and Requirements for Intel® Cyclone® 10 GX Devices

Intel's FPGAs need to follow certain requirements during a power-down sequence. The power-down sequence can be a controlled power-down event via an on/off switch or an uncontrolled event as with a power supply collapse. In either case, you must follow a specific power-down sequence. Below are four power-down sequence specifications. They are either Recommended (one), Required (two), or Relaxed (one). To comply with Intel® ’s FPGA Power-Down requirements, the Recommended option is best.

Note: If you cannot follow the Recommended specification, you must follow the Required specification.

Recommended Power-Down Ramp Specification

This is the best option to minimize power supply currents.

Figure 184. Recommended Power-Down Ramp Specification
  • Power down all power rails fully within 100 ms.
  • Power down power supplies within the same Group in any order.
  • Before Group 2 supplies power down, power down all Group 3 supplies within 10% of GND.
  • Before Group 1 supplies power down, power down all Group 2 supplies within 10% of GND.
  • The maximum voltage differential between any Group 3 supply and any Group 2 supply is 1.92 V.

For Intel® Cyclone® 10 GX devices, you can combine and ramp down Group 3 power rails with Group 2 power rails if the two groups share the same voltage level and the same voltage regulator as the Group 2 power rails.

  • Ensure that the newly combined power rails do not cause any driving of unpowered GPIO or transceiver pins.
  • Ensure that the newly combined power rails do not violate any power-down sequencing specification due to device (third party) leakage; maintain the Required Voltage Differential Specification.

During the power-up/down sequence, the device output pins are tri-stated. To ensure long term reliability of the device, Intel recommends that you do not drive the input pins during this time.

Required Power-Down Ramp Specification

In cases where power supply is collapsing or if the recommended specification cannot be met, the following power-down sequence is required.

Figure 185. Required Power-Down Ramp Specification
  • Power down all power rails fully within 100 ms.
  • As soon as possible, disable all power supplies.
    • Tri-state Group 1 supplies, and do not drive them actively to GND.
    • If possible, drive or terminate Group 2 and Group 3 supplies to GND.
  • Ensure no alternative sourcing of any power supply exists during the power-down sequence; reduce all supplies monotonically and with a consistent RC typical decay.
  • By the time any Group 1 supply goes under 0.35 V, all Group 2 and Group 3 supplies must be under 1.0 V.

Required Voltage Differential Specification

To not excessively overstress device transistors during power-down, there is an additional voltage requirement between any two power supplies between different power groups during power-down:

ΔV < ΔVnom + 500 mV

Figure 186. Required Voltage Differential Specification
  • Power down all power rails fully within 100 ms.
  • For example, if Group 1 Voltage = 0.9 V, Group 2 Voltage = 1.8 V, and Group 3 Voltage = 3.0 V, then:

    G3Vnom = 3.0 V

    G2Vnom = 1.8 V

    G2Vnom = 1.8 V

    G1Vnom = 0.9 V

    G3Vnom = 3.0 V

    G1Vnom = 0.9 V

    (G3V – G2V)nom = 1.2 V (G2V – G1V)nom = 0.9 V (G3V – G1V)nom = 2.1 V
    (G3V – G2V) <= 1.2 V + .5 V (G2V – G1V) <= 0.9 V + .5 V (G3V – G1V) <= 2.1 V + .5 V
    (G3V – G2V) <= 1.7 V (G2V – G1V) <= 1.4 V (G3V – G1V) <= 2.6 V
  • To meet this voltage differential requirement, ramp down all power supplies as soon as possible according to the Required Power-Down Ramp Specification.
Note: Not following the required power sequence can result in unpredictable device operation and internal high current paths.

Relaxed Power-Down Duration Specification

For supplies being powered down with no active termination, voltage reduction to GND slows down as supply approaches 0 V. In this case, the 100 ms power requirement is relaxed - measure it when supply reaches near GND.

Figure 187. Relaxed Power-Down Duration Specification
  • Ensure all Group 1 supplies reach < 100 mV within 100 ms.
  • Ensure all Group 2 and Group 3 supplies reach < 200 mV within 100 ms.