Intel® Cyclone® 10 GX Core Fabric and General Purpose I/Os Handbook

ID 683775
Date 10/31/2022
Document Table of Contents

6.5.2. Intel® Cyclone® 10 GX Package Support for DDR3/DDR3L ×72 with ECC Single and Dual-Rank

To support one DDR3 ×72 interface with ECC (64 bits data + 8 bits ECC) single and dual-rank, you require three I/O banks.

Table 65.  Number of DDR3/DDR3L ×72 Interfaces (with ECC) Single and Dual-rank Supported Per Device Package
Note: The numbers in this table include using the 3 V I/O bank for external memory interfaces. The maximum memory interface clock frequency is capped at 450 MHz. The maximum frequency varies according to protocol rate, device speed grade, and usage of the Ping Pong PHY.
Product Line Package
U484 F672 F780
10CX085 1 1
10CX105 1 1 1
10CX150 1 1 1
10CX220 1 1 1

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