Intel® Cyclone® 10 GX Core Fabric and General Purpose I/Os Handbook

ID 683775
Date 10/31/2022
Public
Document Table of Contents

4.1.3.2. Regional Clock Networks

RCLK networks provide low clock insertion delay and skew for logic contained within a single RCLK region. The Intel® Cyclone® 10 GX IOEs and internal logic within a given region can also drive RCLKs to create internally-generated regional clocks and other high fan-out signals.

Intel® Cyclone® 10 GX devices provide RCLKs that can drive through the chip horizontally. RCLKs cover all the SCLK spine regions in the same row of the device.

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