Intel® Cyclone® 10 GX Core Fabric and General Purpose I/Os Handbook

ID 683775
Date 10/31/2022
Public
Document Table of Contents

3.3.5. DSP Block Cascade Limit in Intel® Cyclone® 10 GX Devices

The spine clock region limits the number of DSP blocks cascade. For Intel® Cyclone® 10 GX devices, you can cascade up to 27 DSP blocks.

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