Intel® Cyclone® 10 GX Core Fabric and General Purpose I/Os Handbook

ID 683775
Date 10/31/2022
Public
Document Table of Contents

7.3.1. MSEL Pin Settings

To select a configuration scheme, hardwire the MSEL pins to VCCPGM or GND without pull-up or pull-down resistors.

Note:
Table 71.  MSEL Pin Settings for Each Configuration Scheme of Intel® Cyclone® 10 GX Devices
Note: Do not drive the MSEL pins with a microprocessor or another device.
Configuration Scheme VCCPGM (V) Power-On Reset (POR) Delay Valid MSEL[2..0]
JTAG-based configuration Use any valid MSEL pin settings below
AS (x1 and x4) 1.8 Fast 010
Standard 011

PS and

FPP (x8, x16, and x32)

1.2/1.5/1.8 Fast 000
Standard 001
Note: You must also select the configuration scheme in the Configuration page of the Device and Pin Options dialog box in the Quartus® Prime Pro Edition software. Based on your selection, the option bit in the programming file is set accordingly.

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