Intel® Cyclone® 10 GX Core Fabric and General Purpose I/Os Handbook

ID 683775
Date 10/31/2022
Public
Document Table of Contents

6.7.1.4. Clock Tree

Compared to previous generation devices, the PHY clock network has a shorter clock tree that generates less jitter and less duty cycle distortion.

The PHY clock network consists of these clock trees:

  • Reference clock tree
  • PHY clock tree
  • DQS clock tree
Figure 118. Clock Network DiagramThe reference clock tree adopts a modular design to facilitate easy integration.


Did you find the information on this page useful?

Characters remaining:

Feedback Message