Intel® Cyclone® 10 GX Core Fabric and General Purpose I/Os Handbook

ID 683775
Date 10/31/2022
Document Table of Contents

2.2.4. Guideline: Consider Power-Up State and Memory Initialization

Consider the power up state of the different types of memory blocks if you are designing logic that evaluates the initial power-up values, as listed in the following table.

Table 4.  Initial Power-Up Values of Embedded Memory Blocks
Memory Type Output Registers Power Up Value
MLAB Used Zero (cleared)
Bypassed Read memory contents
M20K Used Zero (cleared)
Bypassed Zero (cleared)

By default, the Quartus® Prime Pro Edition software initializes the RAM cells in Intel® Cyclone® 10 GX devices to zero unless you specify a .mif.

All memory blocks support initialization with a .mif. You can create .mif files in the Quartus® Prime Pro Edition software and specify their use with the RAM IP core when you instantiate a memory in your design. Even if a memory is pre-initialized (for example, using a .mif), it still powers up with its output cleared.

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