Intel® Cyclone® 10 GX Core Fabric and General Purpose I/Os Handbook

ID 683775
Date 10/31/2022
Public
Document Table of Contents

7.3.3. Configuration Sequence

Describes the configuration sequence and each configuration stage.

Figure 141. Configuration Sequence for Intel® Cyclone® 10 GX Devices


You can initiate reconfiguration by pulling the nCONFIG pin low to at least the minimum tCFG low-pulse width except for configuration using the partial reconfiguration operation. When this pin is pulled low, the nSTATUS and CONF_DONE pins are pulled low and all I/O pins are tied to an internal weak pull-up.

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