Intel® Cyclone® 10 GX Core Fabric and General Purpose I/Os Handbook

ID 683775
Date 10/31/2022
Public
Document Table of Contents

4.3. Clock Networks and PLLs in Intel® Cyclone® 10 GX Devices Revision History

Document Version Changes
2019.06.24
  • Updated the description for single-ended clock inputs in the Dedicated Clock Input Pins section.
  • Added description about PLL lock range in the Reference Clock Sources section.
2018.02.02 Updated the notes on PLL reset in the Reset section.
Date Version Changes
May 2017 2017.05.08 Initial release.

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