Intel® Cyclone® 10 GX Core Fabric and General Purpose I/Os Handbook

ID 683775
Date 10/31/2022
Public
Document Table of Contents

5.4.2. FPGA I/O Resources in Intel® Cyclone® 10 GX Packages

Table 35.  GPIO Buffers and LVDS Channels in Intel® Cyclone® 10 GX Devices
  • The U484 package is a ball grid array with 0.8 mm pitch. All other packages are ball grid arrays with 1.0 mm pitch.
  • The number of LVDS channels does not include dedicated clock pins.
Product Line Package GPIO True LVDS Channels
Code Type 3 V I/O LVDS I/O Total
10CX085 U484 484-pin UBGA 48 140 188 70
F672 672-pin FBGA 48 168 216 84
10CX105 U484 484-pin UBGA 48 140 188 70
F672 672-pin FBGA 48 188 236 94
F780 780-pin FBGA 48 236 284 118
10CX150 U484 484-pin UBGA 48 140 188 70
F672 672-pin FBGA 48 188 236 94
F780 780-pin FBGA 48 236 284 118
10CX220 U484 484-pin UBGA 48 140 188 70
F672 672-pin FBGA 48 188 236 94
F780 780-pin FBGA 48 236 284 118

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