PHY Lite for Parallel Interfaces Intel® FPGA IP User Guide

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ID 683716
Date 12/13/2021
Public

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2.6.1.1. Design Example without Dynamic Reconfiguration

When the Enable dynamic reconfiguration option is not selected, the Intel® Quartus® Prime software generates a design example of PHY Lite for Parallel Interfaces IP without a dynamic reconfiguration module. This design example consists of simulation and synthesis design files.

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