External Memory Interfaces Intel® Agilex™ FPGA IP User Guide

ID 683216
Date 3/28/2022

A newer version of this document is available. Customers should click here to go to the newest version.

Document Table of Contents

3.7. Using a Custom Controller with the Hard PHY

If you want to use your own custom memory controller, you must integrate that controller with the hard PHY to achieve a complete memory solution.

Observe the following general guidelines:

  • When you configure your external memory interface IP, ensure that you select Configuration > Hard PHY Only under the Interface group on the General tab in the parameter editor.
  • The AFI interface is exposed at the top-level of the generated IP core; you can connect the AFI interface to your custom controller. Consult the AFI section for more detailed information on the AFI interface to the PHY.

Did you find the information on this page useful?

Characters remaining:

Feedback Message