External Memory Interfaces Intel® Agilex™ FPGA IP User Guide

ID 683216
Date 3/28/2022
Public

A newer version of this document is available. Customers should click here to go to the newest version.

Document Table of Contents

7. Intel® Agilex™ FPGA EMIF IP – QDR-IV Support

This chapter contains IP parameter descriptions, board skew equations, pin planning information, and board design guidance for Intel® Agilex™ FPGA external memory interface IP for QDR-IV.