11.4. Verifying Memory IP Using the Signal Tap Logic Analyzer
For more information about using the Signal Tap logic analyzer, refer to the Intel® Quartus® Prime Pro Edition User Guide: Debug Tools.
To add the Signal Tap logic analyzer, follow these steps:
- On the Tools menu click Signal Tap Logic Analyzer .
- In the Signal Configuration window next to the Clock box, click … (Browse Node Finder).
- Type the memory interface system clock (typically * emif_usr_clk) in the Named box, for Filter select Signal Tap: presynthesis and click List.
- Select the memory interface clock that is exposed to the user logic.
- Click OK.
- Under Signal Configuration, specify the following settings:
- For Sample depth, select 512
- For RAM type, select Auto
- For Trigger flow control, select Sequential
- For Trigger position, select Center trigger position
- For Trigger conditions , select 1
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