Video and Image Processing Suite User Guide

ID 683416
Date 4/04/2022
Document Table of Contents

24.6. Warp Lite IP Control Registers' Map

Each control register is 32 bits wide.
Table 78.  Warp Lite IP Control Registers
Register Name Description
0 Control Bit 0 of this register is the Go bit, all other bits are unused. Set this bit to 0, to stop the IP.
1 Status Bit 0 of this register is the Status bit, all other bits are unused. The IP sets it to 1 while it processes data. Clearing the GO bit has no effect until the currently processing frame is completed.
2 Interrupt Unused. The IP does not generate any interrupts and does not use the register.
3 V Span Error Reserved.
4 Max V Span
5 V Span Output Line
6 Xoffset_fractional Signed: 1 sign bit; no integer bits; 20 fractional bits
7 Xoffset_integer Signed: 1 sign bit; 13 integer bits
The X_offset value is formed by the concatenation of the two registers above.
8 Yoffset Reserved.
9 Xscale Signed: 1 sign bit; 1 integer bit; 20 fractional bits
10 Yscale Unsigned: 1 integer bit 19 fractional bits
11 Xskew Signed: 1 sign bit; 1 integer bit; 20 fractional bits
12 Yskew Reserved..
13 Xpersp Reserved.
14 Ypersp Signed: 1sign bit; no integer bits; 29 fractional bits
15 Offscreen R/Y Pixel value when rendering off screen regions.
16 Offscreen G/Cr
17 Offscreen B/Cb
18 Width The IP calculates the coefficient values for a specific image size. The values are not valid for any other size of image. The Width and Height registers specify the size of the image for which the IP calculates the coefficients. The IP uses these values to ensure that the coefficients are only applied to images of the correct size.
19 Height

Off-screen Regions

The inverse mapping from the output coordinate space to the input coordinate space may select regions outside the input frame dimensions. The IP sets the output pixel values for these regions to the values in the offscreen control registers.