Video and Image Processing Suite User Guide

ID 683416
Date 4/04/2022
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16.7.1. Frame Writer Only Mode

To configure the Frame Buffer II IP core in frame writer mode, select Module is Frame Writer only mode in the parameter editor.

In this mode, the frame buffer starts writing incoming video frames to DDR at the Frame buffer memory base address register and automatically advances the write address with each incoming frame. The address of each newly written frame is made available through the Frame Start Address register when the write has completed. This is indicated by the available bit (31) of the Frame Start Address register. This register also holds the height, width, and interlaced information for the written frame. It is not possible to instruct the frame buffer where to write individual frames.

Frame details persist until cleared through a write to bit 0 of the Misc register. The write indicates to the Frame writer that the frame has been completely handled and the buffer may be reused. This also causes the Frame Buffer II to clear the available bit, unless another frame has been received in the meanwhile. In this case, the bit remains set and the new Frame Information becomes available.

The Frame Buffer II also raises its interrupt line and sets bit o of the Interrupt register when a new frame is available. The interrupt is cleared down by writing a 1 to the bit.

If additional frames are presented at the input when the frame buffer is already full and you have turned on the Frame dropping parameter, the incoming frames will be dropped. If you did not turn on the Frame dropping parameter, the Frame Buffer II stalls the input.