Video and Image Processing Suite User Guide

ID 683416
Date 4/04/2022
Document Table of Contents

13.3. Chroma Resampler Control Registers

Table 43.  Chroma Resampler II Control Register MapThe Chroma Resampler II IP Core automatically includes an Avalon-MM control slave interface if you select GUI parameters that have either a variable format input or variable format output interface. For variable format interfaces, you select the required input or output subsampling format through the control slave. If both interfaces are fixed formats, then there are no configurable features so the control slave is omitted.
Note: As is the convention with all VIP Suite cores, when a control slave interface is included, the core resets into a stopped state and must be started by writing a ‘1’ to the Go bit of the control register before any input data is processed.
Address Register Description
0 Control Bit 0 of this register is the Go bit, all other bits are unused. Setting this bit to 0 causes the IP core to stop at the end of the next frame/field packet.
1 Status Bit 0 of this register is the Status bit, all other bits are unused. The Chroma Resampler II IP core sets this address to 0 between frames. It is set to 1 while the IP core is processing data and cannot be stopped.
2 Interrupt This bit is not used because the IP core does not generate any interrupts.
3 Selected subsampling Control the selected subsampling format on either the input or output interface (whichever is variable). Write 0 to select 4:2:0, 1 for 4:2:2, and 2 for 4:4:4.