23. Trace System IP Core
The trace system collects data from various monitors, such as the Avalon-ST monitor, and passes it to System Console software on the attached debugging host. System Console software captures and visualizes the behavior of the attached system. You can transfer data to the host over one of the following connections:
- Direct USB connection with a higher bandwidth; for example On-Board USB-Blaster™ II
- If you select the USB connection to the host, the trace system exposes the usb_if interface.
- Export this interface from the Platform Designer system and connect to the pins on the device that connects to the On-Board USB-Blaster II.
Note: To manually connect the usb_if conduit, use the USB Debug Link component, located in Verification > Debug & Performance.
- JTAG connection
- If you select the JTAG connection to the host, then the Intel® Quartus® Prime software automatically makes the pin connection during synthesis.
The Trace System IP core transports messages describing the captured events from the trace monitor components, such as the Frame Reader, to a host computer running the System Console software.
When you instantiate the Trace System IP core, turn on the option to select the number of monitors required. The trace system exposes a set of interfaces: capturen and controln . You must connect each pair of the interfaces to the appropriate trace monitor component.
Each trace monitor sends information about interesting events through its capture interface. The trace system multiplexes these data streams together and, if the trace system is running, stores them into a FIFO buffer. The contents of this buffer are streamed to the host using as much as the available trace bandwidth.
The amount of buffering required depends on the amount of jitter inserted by the link, in most cases, the default value of 32 Kbytes is sufficient.