Video and Image Processing Suite User Guide

ID 683416
Date 4/04/2022
Document Table of Contents

3.1.4. Video Locked Signal

The vid_locked signal indicates that the clocked video stream is active.

When the vid_locked signal has a value of 1, the CVI IP cores take the input clocked video signals as valid, and read and process them as normal. When the signal has a value of 0 (if for example the video cable is disconnected or the video interface is not receiving a signal):

  • Clocked Video Input IP core: The IP core takes the input clocked video signals as invalid and do not process them.
  • Clocked Video Input II IP core: The vid_clk domain registers of the IP core are held in reset and no video is processed. The control and Avalon-ST Video interfaces are not held in reset and will respond as normal. The vid_locked signal is synchronized internally to the IP core and is asynchronous to the vid_clk signal.

If the vid_locked signal goes invalid while a frame of video is being processed, the CVI IP cores end the frame of video early.