AN 796: Cyclone® V and Arria® V SoC Device Design Guidelines

ID 683360
Date 3/30/2022
Document Table of Contents
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3.3.1. HPS Clock Planning

GUIDELINE: Verify MPU and peripheral clocking using Platform Designer (Standard)

Use Platform Designer (Standard) to initially define your HPS component configuration. Set the HPS input clocks, and peripheral source clocks and frequencies. Note any Platform Designer (Standard) warning or error messages. You can address them by modifying clock settings. In some cases you might determine that a particular warning condition does not impact your application.