AN 796: Cyclone® V and Arria® V SoC Device Design Guidelines

ID 683360
Date 3/30/2022
Document Table of Contents Check HPS PLL Lock Status in Preloader

  • Read HPS PLL Status Register in clock_manager.c and print out in spl.c
    • Define global variable in clock_manager.c and “extern variable” in spl.c
    • Unable to printout value in clock_manager.c as the UART has not been initialized yet