3.2.1. HPS Pin Assignment Design Considerations
GUIDELINE: Ensure that you route USB, EMAC and Flash interfaces to HPS Dedicated I/O first, starting with USB.
Intel recommends that you start by routing high speed interfaces such as USB, Ethernet, and flash to the HPS Dedicated I/O first. USB must be routed to HPS Dedicated I/O because it is not available to the FPGA fabric. The flash boot source must also be routed to the HPS dedicated I/O (and not any FPGA I/O) since these are the only I/Os that are functional before the FPGA I/Os have been configured.
GUIDELINE: Enable the HPS GPI pins in the Platform Designer (Standard) HPS Component if needed
By default, the HPS GPI interface is not enabled in Platform Designer (Standard). To enable this interface, you must select the checkbox "Enable HLGPI interface" in the Platform Designer (Standard) HPS Component for Cyclone® V/ Arria® V. These pins are then exposed as part of the Platform Designer (Standard) HPS Component Conduit Interface and can be individually assigned at the top level of the design.