1. Overview of the Design Guidelines for Cyclone® V SoC FPGAs and Arria® V SoC FPGAs 2. Background: Comparison between Cyclone® V SoC FPGA and Arria® V SoC FPGA HPS Subsystems 3. Design Guidelines for HPS portion of SoC FPGAs 4. Board Design Guidelines for SoC FPGAs 5. Embedded Software Design Guidelines for SoC FPGAs A. Support and Documentation B. Additional Information
220.127.116.11. Boot Source 18.104.22.168. Select Desired Flash Device 22.214.171.124. BSEL Options 126.96.36.199. Boot Clock 188.8.131.52. CSEL Options 184.108.40.206. Selecting NAND Flash Devices 220.127.116.11. Determine Flash Programming Method 18.104.22.168. For QSPI and SD/MMC/eMMC Provide Flash Memory Reset 22.214.171.124. Selecting QSPI Flash Devices
4.5.1. HPS EMAC PHY Interfaces 4.5.2. USB Interface Design Guidelines 4.5.3. QSPI Flash Interface Design Guidelines 4.5.4. SD/MMC and eMMC Card Interface Design Guidelines 4.5.5. NAND Flash Interface Design Guidelines 4.5.6. UART Interface Design Guidelines 4.5.7. I2C Interface Design Guidelines 4.5.8. SPI Interface Design Guidelines
5.1.1. Assembling the Components of Your Software Development Platform 5.1.2. Selecting an Operating System for Your Application 5.1.3. Assembling your Software Development Platform for Linux 5.1.4. Assembling a Software Development Platform for a Bare-Metal Application 5.1.5. Assembling your Software Development Platform for a Partner OS or RTOS 5.1.6. Choosing Boot Loader Software 5.1.7. Selecting Software Tools for Development, Debug and Trace
126.96.36.199. Golden System Reference Design (GSRD) for Linux GUIDELINE: To successfully build your software development platform, it is recommended that you use the GSRD as a baseline project, then modify it to suit your application needs. GUIDELINE: It is recommended that all new projects use the latest version of GSRD as a baseline. 188.8.131.52. Source Code Management Considerations 184.108.40.206. GSRD for Linux Development Flow 220.127.116.11. GSRD for Linux Build Flow 18.104.22.168. Linux Device Tree Design Considerations
22.214.171.124. Enable Runtime Calibration Report 126.96.36.199. Change DLEVEL To Get More Debug Information 188.8.131.52. Enable Example Driver for HPS SDRAM 184.108.40.206. Change Data Pattern in Example Driver 220.127.116.11. Example Code to Write and Read from All Addresses 18.104.22.168. Read/Write to HPS Register in Preloader 22.214.171.124. Check HPS PLL Lock Status in Preloader
126.96.36.199. Golden System Reference Design (GSRD) for Linux
The Golden System Reference Design (GSRD) for Linux is provided, which consists of the following:
- GHRD (Golden Hardware Reference Design) - A Quartus Prime project
- Reference U-Boot based Bootloader
- Reference Linux BSP
- Sample Linux Applications
Figure 9. GSRD for Linux - Overview
The GSRD for Linux is a well-tested known good design showcasing a system using both HPS and FPGA resources, intended to be used as a baseline project.
GUIDELINE: To successfully build your software development platform, it is recommended that you use the GSRD as a baseline project, then modify it to suit your application needs.
The GSRDs target the Intel® SoC Development Boards and are provided both in source and pre-compiled form. They can be obtained from GSRD User Manuals.
GUIDELINE: It is recommended that all new projects use the latest version of GSRD as a baseline.
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